QPUStatus

IBM Kingston

Superconducting Transmon • 156 Qubits • Heavy-Hex Lattice • Heron r2 • TLS Mitigation • IBM Quantum System Two • 340K CLOPS
IBM QUANTUM PLATFORM
LOAD
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Pending Jobs
Awaiting telemetry...
RESERVED ACCESS
SOON
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Not Yet Tracked
IBM offers dedicated reservation windows for enterprise clients via IBM Quantum Premium Plan. Reserved session telemetry is planned for future integration.
ON-PREMISES
N/A
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Not Applicable
ibm_kingston is a cloud-access system hosted within an IBM Quantum Data Center. It is not available as a standalone on-premises deployment for third parties.

Live Status: Currently, the IBM Kingston is Online via IBM Quantum Platform (0 jobs). Updated real-time for IBM Quantum circuit monitoring.

QPUStatus is independent. Data from provider APIs may vary from internal states. Trademarks property of IBM Quantum. Not affiliated.

Live Network Load

IBM Quantum Platform

*Metric: Total number of jobs pending execution (Queue Depth) on ibm_kingston via IBM Quantum Platform.

Reserved Access

Reserved Session Telemetry Coming Soon

On-Premises

Not Applicable for ibm_kingston

System Availability Trends

IBM Quantum Platform Availability 100%
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Detailed Connectivity (Last 7 Days)

Unofficial Telemetry Dashboard

This is an independent tracking project. QPUStatus is not affiliated with, endorsed by, or partnered with IBM or IBM Quantum. Our data is gathered automatically via public API routing endpoints and may not perfectly reflect internal hardware states. For authoritative information, visit the IBM Quantum Platform.

Hardware Deep Dive

IBM Kingston (ibm_kingston) is a Heron r2 processor system, sharing the same 156-qubit architecture as ibm_fez and ibm_marrakesh, including tunable couplers and TLS mitigation. IBM names its cloud QPUs after cities. Like other Heron r2 systems, ibm_kingston runs on IBM Quantum System Two inside a dilution refrigerator cooled to approximately a hundredth of a degree above absolute zero. As of March 2026, live calibration data from the IBM Quantum Platform shows ibm_kingston achieving a median two-qubit gate error of 2.02×10-3, a median T1 of 267.71 µs, and 340,000 CLOPS, placing it among the higher-throughput systems in the current public Heron fleet alongside ibm_boston.

Technical Specifications

Architecture Fixed-Frequency Superconducting Transmon
Processor Family Heron r2 Source
Physical Qubits 156 Source
Topology Heavy-Hexagonal Lattice (max 3 neighbors per qubit)
Native Gates CZ, ID, RX, RZ, RZZ, SX, X Source
Tunable Couplers Yes — actively suppresses inter-qubit crosstalk during idle periods Source
TLS Mitigation Yes — controls the chip's TLS environment for improved coherence stability Source
Median 2Q Gate Error 2.02×10−3 (live, Mar 2026) Source
Layered 2Q Gate Error 3.32×10−3 (live, Mar 2026) Source
Median Readout Error 8.97×10−3 (live, Mar 2026) Source
Best 2Q Gate Error 9.11×10−4 (live, Mar 2026) Source
Median CZ Error 2.015×10−3 (live, Mar 2026) Source
Median SX Error 2.293×10−4 (live, Mar 2026) Source
Max Two-Qubit Gates 5,000 (verified at 100-qubit, depth-100 circuit scale) Source
CLOPS 340,000 CLOPS_h (hardware-aware, live Mar 2026) Source
Median T1 / T2 267.71 µs / 138.83 µs (median, live Mar 2026) Source
Operating Temperature Approximately a hundredth of a degree above absolute zero (dilution refrigerator) Source
System IBM Quantum System Two
Cloud Access IBM Quantum Platform (IBM Cloud) via Qiskit SDK

Common Provider Questions

What is the difference between the "median 2Q gate error" and the "layered 2Q gate error" shown on the IBM Quantum Platform?

The median 2Q gate error (sometimes called EPLG per edge) is the error rate measured on a single isolated two-qubit gate in a standard randomised benchmarking experiment. It reflects the best-case fidelity for a single gate in isolation. The layered 2Q gate error is a newer metric IBM introduced to better reflect real circuit performance: it measures error per gate when many two-qubit gates are executed simultaneously across the chip in a single layer, which is how circuits actually run. Simultaneous execution introduces additional crosstalk between gates that the single-gate measurement does not capture. For ibm_kingston, the layered figure (3.32×10-3) is approximately 64% higher than the isolated figure (2.02×10-3), which is typical for Heron r2 systems. When estimating whether your circuit will succeed, the layered metric is generally the more realistic number to use. IBM's QPU information guide documents both metrics in detail.